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34.0 Timed Exposure PRAM Builder Class (36-53234 01)

34.1 Purpose

The purpose of the Timed Exposure PRAM Builder is to generate and load CCD-controller Program RAM instructions which clock the CCDs for the Timed Exposure Science Mode.

34.2 Uses

The following lists the uses of the Timed Exposure PRAM Builder:

1. Build and load Program RAM instructions into a CCD-controller to perform Timed Exposure mode CCD clocking.
   

34.3 Organization

The following illustrates the relationships used by the Timed Exposure PRAM Builder class, PramTe.

FIGURE 152. Timed Exposure PRAM Builder class relationships

PramTe - This class is responsible for generating and loading a series of sequencer Program RAM words needed to clock a CCD for Timed Exposure mode. It provides a function which sets the desired clocking parameters (configure), and provides a function which generates and loads the clocking sequence into a particular DEA CCD-controller (build).

DeaManager - This class is provided by the Protocols class category, and is responsible for managing access to the DEA interface. It provides a function which the builder uses to load words into a CCD-controller's Program RAM (writePram).

SramLibrary - This class is responsible for providing the PRAM builder with the Sequencer RAM (SRAM) locations of various primitives. It provides functions which select certain clocking options to use, such as the high-gain timing for the output register clocking, or the direction to clock the output registers (selectGain, selectOrDirection). It provides functions which supply the address of an SRAM block which does nothing (getIdle), which clock and sample 1 pixel from the output register to the output node (getOrToOn), clock and sum two pixels from the output register to the output node (getOrToOnX2). It also provides functions which return the starting SRAM block and number of contiguous blocks used to clock one row from the image array to the framestore (getImageToFrame), and which clock one row from the framestore into the output registers (getFrameToOr).

34.4 PRAM Builder Design Issues

34.4.1 CCD Organization

Figure 153 illustrates a graphical representation of a single CCD. The figure on the left of the illustration presents a simplified picture of the main CCD components, and the figure on the right illustrates the pixel dimensions of each of the components.

FIGURE 153. Graphical CCD Representation

Each CCD consists of an Image Array, a Framestore, two output registers and four output nodes. Due to an overhang of the cover of the Framestore, only 1024 of the 1026 Image Array rows are used for data acquisition.

34.4.2 Timed Exposure Clocking Sequence

The following illustrates the sequence of operations used to clock CCDs in Timed Exposure Mode:

34.4.3 SRAM Primitives

SRAM consists of a collection of blocks, where each block performs a clocking operation. Some operations can be performed in a single SRAM block, whereas others, due to power constraints, require a series of SRAM blocks. Table 26 lists the SRAM operations used for Timed Exposure Clocking.

TABLE 26. Timed Exposure SRAM Operations

------------------------------------------------------------------------------------------------
Operation             Number of    Description                                                    
                      SRAM Blocks                                                                 
------------------------------------------------------------------------------------------------
Integrate             1            Do not perform any clocking operations.(a)                     
Image to Frame        4 (TBD)      Clock one row from the image array to the framestore, and      
                                   from the framestore to the output registers. TBD: Should we    
                                   also clock the output registers?                               
Frame to OR for       4 (TBD)      Clock one row from the framestore to the output registers,     
Discard                            without clocking the image array. TBD: Should we also          
                                   clock the output registers? If not, use Frame to OR instead.   
Frame to OR           4 (TBD)      Clock one row from the framestore to the output registers,     
                                   without clocking the image array.                              
OR to ON for dis      1            Clock one pixel from the output registers to their output      
card (no summing)                  nodes and discard the result.(b)                               
OR to ON discard      1            Clock two pixels from the output registers to their output     
(x2 summing)                       nodes and discard the result.                                  
OR to ON sample,      1            Clock one pixel from the output registers to their output      
low gain                           nodes and sample the result.                                   
OR to ON sample,      1            Clock one pixel from the output registers to their output      
high gain                          nodes and sample the result. Use signal timing to increase     
                                   gain.                                                          
OR to ON sample,      1            Clock two pixels from the output registers to their output     
x2, low gain                       nodes, and sum and sample the pixels at the output nodes.      
OR to ON sample,      1            Clock two pixels from the output registers to their output     
x2, high gain                      nodes, and sum and sample the pixels at the output nodes.      
Reverse OR to ON      1            Clock one pixel from the output registers to their opposite    
for discard (no sum                output nodes and discard the result.                           
ming)                                                                                             
Reverse OR to ON      1            Clock two pixels from the output registers to their opposite   
discard (x2 sum                    output nodes and discard the result.                           
ming)                                                                                             
Reverse OR to ON      1            Clock one pixel from the output registers to their opposite    
sample, low gain                   output nodes and sample the result.                            
Reverse OR to ON      1            Clock one pixel from the output registers to their opposite    
sample, high gain                  output nodes and sample the result. Use signal timing to       
                                   increase gain.                                                 
Reverse OR to ON      1            Clock two pixels from the output registers to their opposite   
sample, x2, low gain               output nodes, and sum and sample the pixels at the output      
                                   nodes.                                                         
Reverse OR to ON      1            Clock two pixels from the output registers to their opposite   
sample, x2, high                   output nodes, and sum and sample the pixels at the output      
gain                               nodes.                                                         
------------------------------------------------------------------------------------------------

(a)

`Integrate' may be identical to `OR to ON with discard'

(b)

`OR to ON with discard' may be identical to `OR to ON sample', with the pixel code is used to tell the DPA to ignore the pixel.

34.4.4 PRAM Headers and Couplets

This section describes the format of the PRAM words. PRAM consists of collections of word pairs known as `couplets.' Each couplet contains the address of one SRAM block to invoke, a repeat counter indicating the number of times to repeat the block, and a pixel code, which instructs the Front End Processors (FEPs) how to process pixels being clocked while the SRAM block is being invoked. Each invocation of a couplet takes 1 pixel clock period (~10us).

While PRAM is running, pixel clocks are always being delivered to the FEPs, regardless of whether pixel data is being clocked out of the CCDs or not. The pixel code portion of the couplets indicate how the FEPs interpret the data. Valid pixel data is flagged using a "Valid Pixel" code, and overclock pixels are flagged using an "Overclock" code. All other codes cause the clocked pixel data to be ignored. These include the "Vsync" code, which indicates that a new image has been started, the "Hsync" code, which indicates that a new image row is about arrive, and the "Ignore" code, which indicates that the clocked pixel should be completely ignored by the FEPs.

Each collection of couplets is preceded by a pair of `header' words. The header consists of the number of couplets which follow the block, the number of times to repeat the collection of couplets, and an action to perform once the collection of couplets. These actions include: halt the sequencer, continue to the header immediately following the couplet collection, jump to the first PRAM location (restart), and jump to the indicated PRAM page.

34.4.5 Clocking Algorithm

The following illustrates the clocking algorithm using pseudo-code, where the bolded text indicates operations which utilize the header repeat counter, italicized text indicates operations which can be accomplished using a single SRAM block and utilize the couplet repeat counter, and the underlined text indicates looping operations which are "unrolled" by the builder:

PRAM Page 0:
  Flush the image array into the framestore
  Jump to PRAM Page 1
PRAM Page 1:
  /* ---- Expose primary exposure time ---- */
  IF primary exposure time is less than transfer time
    Flush image array into framestore
  ENDIF
  Integrate CCD for (primary exposure time - transfer time)
  /* ---- Transfer image to DPA ---- */
  Move 1026 rows from the image array to the framestore
  Locate first row of subarray to first row of framestore
  Discard output register
  REPEAT for each subarray row
    IF 2x2 sum
      Move two rows from framestore to output registers
    ELSE
      Move one row from framestore to output registers
    ENDIF      
    Discard 4 dummy output register pixels
    REPEAT for all pixels in output register
      IF 2x2 sum
        Clock, sum and sample 2 pixels from output registers
      ELSE
        Clock and sample 1 pixel from output registers
      ENDIF
    ENDREPEAT
    Discard TBD output register pixels prior to producing overclocks
    REPEAT for each overclock pixel
      IF 2x2 sum
        Clock, sum and sample 2 overclocks from output register    
      ELSE
        Clock and sample 1 overclock pixel from output register
      ENDIF
    ENDREPEAT
  ENDREPEAT
  /* ---- Secondary exposures ---- */
  REPEAT duty cycle times
    /* --- Expose Secondary exposure time --- */
    IF secondary exposure time is less than transfer time
      Flush image array into framestore
    ENDIF
    Integrate CCD for (secondary exposure time - transfer time)
    Transfer subarray image to DPA as described above
  ENDREPEAT
  Jump to PRAM Page 1

34.4.6 Parallel Transfers with Multiple CCDs

Due to constraints in the ability of the power-supply to deliver enough current to clock large numbers of pixels in all CCDs, each major set of contiguous row transfers from the image array to the framestore, or from the framestore to the output registers must be performed at different times on each CCD. In order to avoid noise from large row transfers on one CCD affecting the Analog-to-Digital conversion on another, all CCDs transfer their respective images to the DEA video system at the same time.

Figure 154 illustrates a one-and-a-half exposure time-line when clocking six CCDs.

FIGURE 154. Single CCD Clocking Sequence

Figure 155 illustrates various clocking scenarios for CCDs in parallel.

FIGURE 155. Multiple CCD Clocking

In order to schedule each portion of the clocking operation, the PRAM builder must compute the time required to perform the image array to framestore transfer for a CCD, the time to position the first row of a subarray to the bottom of the framestore, and the time to transfer the subarray image to the DEA video system, and subsequently, on to the DPA's FEPs.

The time to transfer one row from the image array to the framestore is determined by the number of SRAM major cycles needed to perform the operation. The time to transfer the entire image array, is computed by multiplying the answer by 1026 rows. The minimum exposure time supported by the instrument is this result, times the number of CCDs minus 1.

The time to position the subarray to the end of the framestore is the number of SRAM major cycles needed to clock 1 row in the framestore times the location of the first row of the subarray.

The time taken to transfer the subarray image from the framestore to the DPA is a function of the number of rows in the subarray, the output node configuration, and the on-chip summing selection. In order to reduce the possibility of error when and if changes are made in how images are transferred from the framestore, the builder uses a two-pass approach when building images.

In the first pass, the builder counts the number of cycles used to transfer the image, but does not emit any codes to the DEA. During the second pass, the builder uses the computed transfer time to schedule short and long exposures, and to determine how much time must be inserted to achieve the desired integration times.

34.5 Class PramTe

Documentation:

This class generates the Program RAM sequence needed to perform Timed-Exposure clocking of a CCD.

Export Control:

Public

Cardinality:

n

Hierarchy:

Superclasses:

none

Public Uses:

SramLibrary

Implementation Uses:

DeaManager

Public Interface:

Operations:

build()
configure()

Protected Interface:

Operations:

blockEnd()
blockStart()
emitBlockHeader()
emitBranchBlock()
emitCouplet()
emitDiscardOr()
emitExposure()
emitFlushImage()
emitFrameToOr()
emitImageToFrame()
emitIntegrate()
emitOutputPixel()
emitOverclockPixel()
emitSumOr()
emitSumOverclock()
emitTransferFrame()
generateSequence()
setPramBlock()

Private Interface:

Has-A Relationships:

unsigned exposureTime[2]: Primary and Secondary Exposure Times

unsigned dutyCycle: Number of exposureTime[1]'s per exposureTime[0]'s, starting with exposureTime[0].

unsigned rowStart: First row of subarray, not including the two dummy rows at the start of the image (see dummyRows).

unsigned rowEnd: Last row of subarray.

QuadMode qMode: Output node configuration, either Full, Diagnostic, AC, or BD.

unsigned overclockPairs: Number of pairs of overclock pixels to output

Boolean sumFlag: 2x2 On-chip summing flag. If BoolFalse, no on-chip summing, if BoolTrue, sum pairs of columns and rows.

Boolean gain4: Determines whether or not to use high-gain SRAM timing. If BoolFalse, use 1:1 SRAM, if BoolTrue, use 4:1 SRAM timing.

const unsigned arrayRows: Number of non-summed rows in the CCD Image and Frame Store

const unsigned nodeCols: Number of un-summed columns per output node (assuming all 4 nodes in use)

const unsigned dummyCols: Number of dummy columns between the output register and the output node.

const unsigned dummyRows: Number of rows to skip between each image.

const unsigned clocksPerExpTime: Number of pixel clocks per input exposure time units (i.e. number of clocks per 0.1 second).

const Boolean phaseDelay: Flag indicating that the image-to-frame transfers from each of the CCDs should be scheduled to occur at different times. If BoolFalse, then the image-to-frame transfers may occur concurrently. If BoolTrue, then the transfers must occur separately for each CCD.

const unsigned ocDummy: This contains the number of dummy pixels to clock out of the output register prior to clocking out overclock pixels.

DeaBoardId curboard: This specifies the current DEA CCD-controller being programmed.

unsigned curslot: This specifies the current parallel transfer slot to use for the selected CCD-controller board.

Implementation:

Has-A Relationships:

unsigned exposureClocks[2]: These indicate the primary and secondary exposure times, expressed in units of pixel clocks.

unsigned shiftCols: This specifies the number of unsummed columns per output node (not including dummy columns).

unsigned summedRows: This is the total number of summed rows to clock out of the CCD.

unsigned summedShiftCols: This specifies the number of summed columns to shift out for each row.

unsigned xfrImageToFrame: This contains the number of clock cycles needed for one CCD to transfer all rows from its image array to its framestore (i.e. # SRAM cycles/row * 1026 rows).

unsigned xfrSlots: This contains the number of chips being configured. If phaseDelay is BoolTrue, the value is used to stagger the parallel transfers of each CCD being used.

unsigned xfrSubarrayStart: This contains the number of clock cycles needed for one CCD to position the first row of its subarray to the bottom of the framestore (i.e. # SRAM cycles/row * (subarray start + 2 dummy rows).

unsigned pramAddress: Current PRAM Address

enum BLK_STATE blockState: Indicates current PRAM header state. BLK_NONE indicates no header has been written, BLK_STARTED indicates that space for a block has been reserved at location blockAddress. BLK_ENDED indicates that a block has been ended but not yet written. blockAddress contains the address for the header, blockCount indicates the number of couplets in the block, and blockRepeat indicates the number of times to repeat the block.

unsigned blockAddress: PRAM Address of started header block

unsigned blockRepeat: Repeat count for the header block

unsigned blockCount: Number of SRAM couplets in the block

Boolean timingRun: Flag indicating that we're just computing transfer times. BoolFalse indicates that PRAM codes are being generated, and BoolTrue indicates that we're just measuring transfer times.

unsigned coupletCount: Number of couplet iterations emitted

unsigned xfrTime: Total transfer time for an exposure, including time taken by other CCDs to clock their image array to their framestore, time for all CCDs to position their first subarray row to the bottom of their framestore, and time taken to transfer the subarray image to the video chains. This time does NOT include the time taken by the current CCD to transfer its image array to its framestore (`smear' time).

unsigned savedCoupletCount: Saved version of coupletCount for repeating blocks.

Boolean configured: This flag indicates whether or not configure() has been called. If not, this field contains BoolFalse. If configure() has been called the field is BoolTrue.

Concurrency:

Guarded

Persistence:

Transient

34.5.1 blockEnd()

Protected member of:

PramTe


void


This function marks the end of a PRAM block by setting blockState to BLK_ENDED, and computes the number of SRAM major cycles produced by the completed block and adds the result to the current running total.

Preconditions

This function assumes that blockStart() has been called and that blockState is set to BLK_STARTED. savedCoupletCount must contain the running SRAM cycle count prior to the start of the block, blockRepeat must contain the number of times the block is to be repeated, and coupletCount contains the number of SRAM cycles within the block.

Semantics

Compute total cycle count within block by multiplying coupletCount and blockRepeat. Set the total running count by adding savedCoupletCount and zero savedCoupletCount. Indicate the block completion by setting blockState to BLK_ENDED.

Postconditions

blockState = BLK_ENDED, coupletCount has the updated running total number of SRAM cycles and blockRepeat remains intact for use by emitBlockHeader().

Concurrency:

Guarded

34.5.2 blockStart()

Protected member of:

PramTe


Boolean


unsigned repeat

This function starts a block, storing repeat as the block's repeat count, blockRepeat, and zeroing the block's couplet count, blockCount.

Preconditions:

repeat must not be zero and must be less than or equal to PRAM_MAX_HDR_REPEAT (4096).

Semantics

If a previous block has been started (blockState == BLK_STARTED), end it by calling blockEnd(). If the header from the previous block has not been output yet (blockState == BLK_ENDED), emit the header using emitBlockHeader(). Store repeat in blockRepeat, the current pramAddress in blockAddress, and zero blockCount. Save the current SRAM cycle count, coupletCount, into savedCoupletCount, and zero coupletCount. Advance the current PRAM address, pramAddress, by two locations and indicate that a block is in progress by setting blockState to BLK_STARTED.

Postconditions

blockState = BLK_STARTED, coupletCount is zero to start logging the number of SRAM cycles within the block. The block must be ended using blockEnd(), and flushed to PRAM using emitBlockHeader().

Concurrency:

Guarded

34.5.3 build()

Public member of:

PramTe


Boolean


DeaBoardId boardid
unsigned phaseslot

This function builds a PRAM sequence and loads the sequence into the DEA CCD-controller specified by boardid. phaseSlot specifies parallel transfer slot is used by the board. phaseSlot can range from 0 to the number of configured CCDs (see configure()).

Preconditions:

configure() must have been called (configured == BoolTrue), boardid must identify a CCD-controller, and phaseslot must be less than the total number of boards specified by the most recent call to configure() (phaseslot < xfrSlots).

Semantics

Store boardid into curboard, and phaseslot into curslot. Measure the framestore to DPA transfer time by setting timingRun to BoolTrue and calling generateSequence(). The results will be saved in xfrTime. Then generate and load the sequence into the selected controller by setting timingRun to BoolFalse and calling generateSequence() a second time.

Postconditions

The selected CCD-controller's PRAM will contain the generated instruction sequence.

Concurrency:

Guarded

34.5.4 configure()

Public member of:

PramTe


Boolean


unsigned boardcnt
unsigned expPrimary
unsigned expSecondary
unsigned expDuty
unsigned rowstart
unsigned rowend
Boolean sum2x2
QuadMode quadrants
unsigned ocPairs
Boolean highGain
const SramLibrary& sramlib

This function configures the Timed Exposure PRAM builder. boardcnt is the total number of CCDs being clocked, expPrimary is the primary exposure time, expSecondary is the secondary exposure time, and expDuty is the number of expSecondary exposures per expPrimary exposures. rowstart is the index of the first CCD row of the subarray, and rowend is the index of the last row. sum2x2 indicates whether or not to perform 2x2 on-chip summation. quadrants indicates the output node configuration and clocking direction (Full, Diagnostic, AC, or BD). ocPairs indicates the number of pairs of overclock pixels to generate. sramlib is a reference to the SRAM library to use for the run

Preconditions:

rowstart must be less than or equal to rowend, which must be less than 1024.

Semantics

Copy the parameters into the corresponding instance variables, configure the SRAM library's gain and output register direction, and compute derived clocking count information. Finally, set configured to BoolTrue.

Concurrency:

Guarded

34.5.5 emitBlockHeader()

Protected member of:

PramTe


Boolean


unsigned operation
unsigned page

This function emits the PRAM couplet block header, storing blockRepeat for the repeat count, and blockCount as the couplet count. operation is the action the sequencer should take after the block has been run, and page indicates the page address to jump to (if action is to page jump). NOTE: This function was not combined with blockEnd() because the operation and page information are not necessarily known when blockEnd() is called.

Preconditions:

blockEnd() must have been called (blockState == BLK_ENDED), and there must be at least 1 couplet within the block (blockCount != 0), and 1 iteration of the block (blockRepeat != 0). This function assumes that blockAddress is set to the desired PRAM address of the header.

Semantics

Fill the header sequence count (blockRepeat - 1), post-block operation (operation), couplet count (blockCount -1), and post-block page (page). If not performing a timing run (timingRun == BoolFalse), call deaManager.writePram() to write the header word pair into the CCD-controller's PRAM. Once written, zero blockRepeat and blockCount. Indicate that no header block is active or waiting to be flushed by setting blockState to BLK_NONE.

Postconditions

If not performing a timing run, the current block's header is written into PRAM. The current block is ended. In order to write another set of couplets, blockStart() must be called.

Concurrency:

Guarded

34.5.6 emitBranchBlock()

Protected member of:

PramTe


Boolean


unsigned id

This function emits a PRAM instruction which jumps to a new PRAM block, indicated by id.

Preconditions:

A block must be in-progress or waiting to be written (i.e. blockState != BLK_NONE)

Semantics

If a block has been started, but has not yet been ended (blockState == BLK_STARTED), call blockEnd() to close it off. Then call emitBlockHeader(), passing a "jump to page" as the operation to perform once the block has been run, and id as the page to jump to.

Concurrency:

Guarded

34.5.7 emitCouplet()

Protected member of:

PramTe


Boolean


unsigned sramaddr
unsigned pixcode
unsigned repeat

This function emits a couplet, where sramaddr is the index of the SRAM block to cycle, pixcode is the pixel code to emit during the cycle, and repeat is the number of times to repeat the cycle.

Preconditions:

repeat must not be zero and must be less than or equal to PRAM_MAX_BLK_REPEAT (4096). The number of couplets associated with the current header, blockCount, must be less than PRAM_MAX_BLOCKS (4096).

Semantics

If a PRAM header has not been started, start one by calling blockStart(), using a repeat count of 1. Fill the couplet pixel code using pixcode, its SRAM address using sramaddr, and the number of times to repeat the single SRAM block (repeat - 1). If not performing a timing run (timingRun == BoolFalse), call deaManager.writePram() to write the couplet word pair into the CCD-controller's PRAM. Once written, advance the number of cycles produced by incrementing coupletCount by repeat. Advance the PRAM address by two words, and increment the number of couplets in the current block (blockCount).

Concurrency:

Guarded

34.5.8 emitDiscardOr()

Protected member of:

PramTe


Boolean


unsigned npix
unsigned pixcode

Emit PRAM couplets which clock npix columns from the output register into the output node, each time, discharging the output node, effectively discarding the pixels. pixcode indicates the pixel code to use when discarding the pixels.

Semantics

If npix is greater than or equal to 2, start by discarding pixels two at a time by fetching the SRAM block using sramLibrary->getOrToOnX2(), and emitting the couplet with a repeat count of npix/2, using emitCouplet(). Pass pixcode as the pixel code to emit while performing the clocking. Then adjust npix to contain the remainder (NOTE: Use of a remainder is a hook in case faster SRAM blocks become available).

If npix is not zero (in this case, it will be 1), get the SRAM block to discard 1 pixel using sramLibrary->getOrToOn(), and emit the couplet to repeat npix times, using emitCouplet() and passing pixcode as the pixel code to emit while performing the clocking.

Concurrency:

Guarded

34.5.9 emitExposure()

Protected member of:

PramTe


Boolean


unsigned expclocks

Emit PRAM instructions to integrate the CCD for a period of time, and then transfer the exposed image to the DPA. The total integration of the image is specified by expclocks.

Preconditions:

If not performing a timing run, xfrTime must contain the number of clock cycles used to transfer an image from the framestore to the DPA. This function assumes that previous cycles have integrated the CCD for this period of time.

Semantics

If xfrTime is greater than expclocks, emit instructions to flush the contents of the image array, using emitFlushImage(). If not, subtract xfrTime from expclocks, and if the result is not zero, emit instructions to integrate the CCDs for the remaining time using emitIntegrate().

After the CCD has been integrated, emit instructions to transfer the image array into the framestore using emitImageToFrame(), and then zero coupletCount and savedCoupletCount to support measurement of the transfer time of the image to the DPA. Call emitFrameToOr() to emit instructions to clock the framestore until the first row of the subarray is in the first row of the framestore, and then call emitDiscardOr() to discard the contents of the output registers.

Then emit instructions to transfer the image from the framestore to the DPA using emitTransferFrame(). If measuring the transfer time (timingRun == BoolTrue), store the total SRAM cycles produced after the image to framestore (coupletCount) as the transfer time of the image (xfrTime).

Concurrency:

Guarded

34.5.10 emitFlushImage()

Protected member of:

PramTe


Boolean


unsigned nrows

Emit PRAM instructions to transfer nrows rows from the image array to framestore and from the framestore to the output register for discard. This function calls emitImageToFrame() to emit the instructions for the transfer.

Concurrency:

Guarded

34.5.11 emitFrameToOr()

Protected member of:

PramTe


Boolean


unsigned nrows

Emit PRAM couplets which transfer nrows from the framestore into the output register. The charge from the rows will be summed together and with whatever charge exists in the output register.

Semantics

Call sramLibrary->getFrameToOr() to obtain the starting index of the series of blocks which transfer one row from the framestore to the output register, and to obtain the number of adjacent blocks need for the transfer. If only 1 block is required, call emitCouplet(), passing the index of the block, and a repeat count of nrows to emit the PRAM instructions for the transfer.

If more than one block is needed and more than one row is being output, call blockStart() to form a header which repeats nrows times. If only one row is being output, no special header is required. Then call emitCouplet() for each SRAM block in the series. If a header was started, call blockEnd() to finish of the repeating block.

Concurrency:

Guarded

34.5.12 emitImageToFrame()

Protected member of:

PramTe


Boolean


unsigned nrows

Emits PRAM directives to transfer nrows from the image array to the framestore and from the framestore to the output register.The charge from the framestore rows will be summed together and with whatever charge exists in the output register.

Semantics

Call sramLibrary->getImageToFrame() to obtain the starting index of the series of blocks which transfer one row from the image array to the framestore and from the framestore to the output register, and to obtain the number of adjacent blocks need for the transfer. If only 1 block is required, call emitCouplet(), passing the index of the block, and a repeat count of nrows to emit the PRAM instructions for the transfer.

If more than one block is needed and more than one row is being output, call blockStart() to form a header which repeats nrows times. If only one row is being output, no special header is required. Then call emitCouplet() for each SRAM block in the series. If a header was started, call blockEnd() to finish of the repeating block.

Concurrency:

Guarded

34.5.13 emitIntegrate()

Protected member of:

PramTe


Boolean


unsigned expcounts

This function emits an SRAM block which lets the CCD sit still (expose) for expcounts pixel clock cycles.

Preconditions:

expcounts must be less than PRAM_MAX_HDR_REPEAT * PRAM_MAX_BLK_REPEAT (about 170 seconds).

Semantics

This function calls sramLibrary>getIdle() to obtain the index of the SRAM block to use. It then compares expcounts to the maximum cycles handled by a single couplet, PRAM_MAX_BLK_REPEAT. If expcounts is greater than PRAM_MAX_BLK_REPEAT, start a repeating block using blockStart(), passing expcount divided by PRAM_MAX_BLK_REPEAT as the number of times to repeat the couplets. Then call emitCouplet(), passing PRAM_MAX_BLK_REPEAT as the number of times to execute the block, and call blockEnd() to mark the end of the repeating block.

If expcounts was less than PRAM_MAX_BLK_REPEAT, or the remainder was not zero, call emitCouplet() to continue to integrate for the required time.

Concurrency:

Guarded

34.5.14 emitOutputPixel()

Protected member of:

PramTe


Boolean


unsigned npix

Emit PRAM couplets which transfer npix pixels from the output register to the output node and sample each pixel at the output node. This function calls sramLibrary>getOrToOn() to obtain the index of the SRAM block to use to output and sample a single pixel, and then calls emitCouplet(), passing npix as the repeat count, and using the `valid pixel' pixel code to indicate to the DPA that the pixel is part of the image data.

Concurrency:

Guarded

34.5.15 emitOverclockPixel()

Protected member of:

PramTe


Boolean


unsigned npix

Emit PRAM instructions to clock and sample npix overclock pixels from the output register. This function calls sramLibrary>getOrToOn() to obtain the index of the SRAM block to use to output and sample a single pixel, and then calls emitCouplet(), passing npix as the repeat count, and using the `overclock' pixel code to indicate to the DPA that the pixel is part of the image's overclock data.

Concurrency:

Guarded

34.5.16 emitSumOr()

Protected member of:

PramTe


Boolean


unsigned npix

Emit PRAM instructions to clock and sum two pixels from the output register into the output node, and then sample and transmit the result to the DPA. npix indicates the number of pairs of pixels to clock. This function calls sramLibrary>getOrToOnX2() to obtain the index of the SRAM block to use to sum and sample two pixels at a time, and then calls emitCouplet(), passing npix as the repeat count, and using the `valid pixel' pixel code to indicate to the DPA that the pixel is part of the image data.

Concurrency:

Guarded

34.5.17 emitSumOverclock()

Protected member of:

PramTe


Boolean


unsigned npix

Emit PRAM instructions to clock and sum pairs of overclock pixels from the output register. npix indicates the number of pairs of overclock pixels to clock. This function calls sramLibrary>getOrToOnX2() to obtain the index of the SRAM block to use to sum and sample two pixels, and then calls emitCouplet(), passing npix as the repeat count, and using the `overclock' pixel code to indicate to the DPA that the pixel is part of the image's overclock data.

Concurrency:

Guarded

34.5.18 emitTransferFrame()

Protected member of:

PramTe


Boolean


unsigned nrows

Emit PRAM instructions to transfer nrows of an image from the framestore to the DEA/DPA via the output registers and output node.

Semantics

No 2x2 Summation:

Transfer first row of image from framestore to output register, using emitFrameToOr(), discard first 4 dummy pixels by calling emitDiscardOr(). On the fourth dummy pixel, indicate the start of a new image, by passing a "Vsync' pixel code. Output the contents of the first row by calling emitOutputPixel(). If any overclocks where configured, discard the first few overclocks using emitDiscardOr(), and then output the desired number of overclocks using emitOverclockPixel(). If there is more than 1 row remaining in the image, start a repeat block header using blockStart(). If there is only one row remaining, a repeating block is not needed. Transfer the subsequent rows from the framestore to the output register in the same fashion as the first row, except use the "Hsync" pixel code, rather than the "Vsync" code, to indicate the start of each line. If a repeating block was created to handle the subsequent rows, call blockEnd() to end it.

2x2 Summation:

Perform most of the same steps described above, however, clock two rows at a time from the framestore to the output register, and use emitSumOr(), rather than emitOutputPixel(), to output pixels, and use emitSumOverclock(), rather than emitOverclockPixel(), to output overclocks.

Concurrency:

Guarded

34.5.19 generateSequence()

Protected member of:

PramTe


Boolean


This function runs through the PRAM generation process. If timingRun is BoolTrue, no loads to the DEA are performed. If timingRun is BoolFalse, then the generated PRAM words are loaded into the DEA CCD-controller board. Upon returning, xfrTime contains the transfer time for an exposure.

Semantics

Generate an initial flush of the image array in PRAM Page 0. Call setPramBlock() to set pramAddress to page 0, and then call emitFlushImage() to generate PRAM instructions to transfer the image array to the framestore. If the transfer time is less than the primary exposure time (xfrTime < exposureClocks[0]), pass the difference to emitIntegrate() to simulate the integration time during a pseudo-transfer prior to the first exposure. Call emitBranchBlock() to produce a jump to PRAM Page 1 after the initial flush and pseudo-transfer is complete.

Generate the main exposure sequence in PRAM Page 1. Call setPramBlock() to set pramAddress to page 1. If doing a timing measurement, clear xfrTime. Generate the PRAM load for the primary exposure, by passing exposureClocks[0] to emitExposure(). If the secondary exposure time is different than the primary time, and the dutyCycle parameter is not zero, produce a series of secondary exposures by calling emitExposure() dutyCycle times, passing exposureClocks[1] as the desired exposure time. NOTE: The transfer time of the primary and secondary exposures must be identical.

Once the main exposures have been produced, produce a jump back to PRAM Page 1 using emitBranchBlock().

Concurrency:

Guarded

34.5.20 setPramBlock()

Protected member of:

PramTe


void


unsigned id

This function sets the current pramAddress according to the PRAM block selected by id, which can range from 0 to 15.

Concurrency:

Guarded

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