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35.0 Continuous Clocking PRAM Builder Class (36-53235 01)

35.1 Purpose

The purpose of the Continuous Clocking PRAM Builder is to generate and load CCD-controller Program RAM instructions which clock the CCDs for the Continuous Clocking Science Mode.

35.2 Uses

The following lists the uses of the Continuous Clocking PRAM Builder:

1. Build and load Program RAM instructions into a CCD-controller to perform Continuous Clocking mode CCD clocking.
   

35.3 Organization

The following illustrates the relationships used by the Continuous Clocking PRAM Builder class, PramCc.

FIGURE 156. Continuous Clocking PRAM Builder class relationships

PramCc - This class is responsible for generating and loading a series of sequencer Program RAM (PRAM) words needed to clock a CCD for Continuous Clocking mode. It provides a function which sets the desired clocking parameters (configure), and provides a function which generates and loads the clocking sequence into a particular DEA CCD-controller (build).

DeaManager - This class is provided by the Protocols class category, and is responsible for managing access to the DEA interface. It provides a function which the builder uses to load words into a CCD-controller's Program RAM (writePram).

SramLibrary - This class is responsible for providing the PRAM builder with the Sequencer RAM (SRAM) locations of various primitives. It provides functions which select certain clocking options to use, such as the high-gain timing for the output register clocking, or the direction to clock the output registers (selectGain, selectOrDirection). It provides functions which supply the address of an SRAM block which clock and sample 1 pixel from the output register to the output node (getOrToOn), clock and sum two pixels from the output register to the output node (getOrToOnX2), clock and sum, without sampling, two pixels into the output register (getOrToOnSumX2). It also provides a function which return the starting SRAM block and number of contiguous blocks used to clock one row from the image array to the framestore and from the framestore to the output registers (getImageToFrame).

35.4 PRAM Builder Design Issues

35.4.1 CCD Organization

Figure 157 illustrates a graphical representation of a single CCD. The figure on the left of the illustration presents a simplified picture of the main CCD components, and the figure on the right illustrates the pixel dimensions of each of the components.

FIGURE 157. Graphical CCD Representation

Each CCD consists of an Image Array, a Framestore, two output registers and four output nodes. Due to an overhang of the cover of the Framestore, only 1024 of the 1026 Image Array rows are used for data acquisition.

35.4.2 Continuous Clocking Sequence

The following illustrates the sequence of operations used to clock out one summed CCD row in Continuous Clocking Mode:

35.4.3 SRAM Primitives

SRAM consists of a collection of blocks, where each block performs a clocking operation. Some operations can be performed in a single SRAM block, whereas others, due to power constraints, require a series of SRAM blocks. Table 27 lists the SRAM operations used for Continuous Clocking Mode.

TABLE 27. Continuous Clocking SRAM Operations

------------------------------------------------------------------------------------------------
Operation             Number of    Description                                                    
                      SRAM Blocks                                                                 
------------------------------------------------------------------------------------------------
Image to Frame        4 (TBD)      Clock one row from the image array to the framestore, and      
                                   from the framestore to the output registers. TBD: Should we    
                                   also clock the output registers?                               
OR to ON discard      1            Clock two pixels from the output registers to their output     
(x2)                               nodes and discard the result.                                  
OR to ON sum, x2      1            Clock and sum two pixels from the output registers into the    
                                   output nodes.                                                  
OR to ON sample,      1            Clock one pixel from the output registers to their output      
low gain                           nodes and sample the result.                                   
OR to ON sample,      1            Clock one pixel from the output registers to their output      
high gain                          nodes and sample the result. Use signal timing to increase     
                                   gain.                                                          
OR to ON sample,      1            Clock two pixels from the output registers to their output     
x2, low gain                       nodes, and sum and sample the pixels at the output nodes.      
OR to ON sample,      1            Clock two pixels from the output registers to their output     
x2, high gain                      nodes, and sum and sample the pixels at the output nodes.      
Reverse OR to ON      1            Clock and sum two pixels from the output registers into        
sum, x2                            their opposite output nodes.                                   
Reverse OR to ON      1            Clock two pixels from the output registers to their opposite   
discard (x2 sum                    output nodes and discard the result.                           
ming)                                                                                             
Reverse OR to ON      1            Clock one pixel from the output registers to their opposite    
sample, low gain                   output nodes and sample the result.                            
Reverse OR to ON      1            Clock one pixel from the output registers to their opposite    
sample, high gain                  output nodes and sample the result. Use signal timing to       
                                   increase gain.                                                 
Reverse OR to ON      1            Clock two pixels from the output registers to their opposite   
sample, x2, low gain               output nodes, and sum and sample the pixels at the output      
                                   nodes.                                                         
Reverse OR to ON      1            Clock two pixels from the output registers to their opposite   
sample, x2, high                   output nodes, and sum and sample the pixels at the output      
gain                               nodes.                                                         
------------------------------------------------------------------------------------------------

35.4.4 PRAM Headers and Couplets

This section describes the format of the PRAM words. PRAM consists of collections of word pairs known as `couplets.' Each couplet contains the address of one SRAM block to invoke, a repeat counter indicating the number of times to repeat the block, and a pixel code, which instructs the Front End Processors (FEPs) how to process pixels being clocked while the SRAM block is being invoked. Each invocation of a couplet takes 1 pixel clock period (~10us).

While PRAM is running, pixel clocks are always being delivered to the FEPs, regardless of whether pixel data is being clocked out of the CCDs or not. The pixel code portion of the couplets indicate how the FEPs interpret the data. Valid pixel data is flagged using a "Valid Pixel" code, and overclock pixels are flagged using an "Overclock" code. All other codes cause the clocked pixel data to be ignored. These include the "Vsync" code, which indicates that a new image has been started, the "Hsync" code, which indicates that a new image row is about arrive, and the "Ignore" code, which indicates that the clocked pixel should be completely ignored by the FEPs.

Each collection of couplets is preceded by a pair of `header' words. The header consists of the number of couplets which follow the block, the number of times to repeat the collection of couplets, and an action to perform once the collection of couplets. These actions include: halt the sequencer, continue to the header immediately following the couplet collection, jump to the first PRAM location (restart), and jump to the indicated PRAM page.

35.4.5 Clocking Algorithm

The following illustrates the clocking algorithm using pseudo-code, where the bolded text indicates operations which utilize the header repeat counter, italicized text indicates operations which can be accomplished using a single SRAM block and utilize the couplet repeat counter, and the underlined text indicates looping operations which are "unrolled" by the builder:

PRAM Page 0:
  /* ---- Flush contents of image array and framestore ----
  REPEAT for 2 * 1026 rows
    Clock image array/framestore to sum "n" rows in output registers
    Discard 4 dummy output register pixels
    REPEAT for all summed pixels in output register
      Clock output register to sum "m" pixels. Discard result.
    ENDREPEAT
    Discard TBD output register pixels prior to producing overclocks
    REPEAT for each overclock pixel sum
      Clock output register to sum "m" overclocks. Discard result.
    ENDREPEAT
  ENDREPEAT
  Jump to PRAM Page 1
PRAM Page 1:
  /* ---- Clock and emit first row of data set ---- */
  Clock image array/framestore to sum "n" rows in output registers
  Discard 4 dummy pixels, and indicate start of data set (VSYNC)
  REPEAT for all summed pixels in output register
    Clock output register to sum "m" pixels. Sample result.
  ENDREPEAT
  Discard TBD output register pixels prior to producing overclocks
  REPEAT for each overclock pixel sum
    Clock output register to sum "m" overclocks. Sample result.
  ENDREPEAT
  /* ---- Clock remaining rows of data set ---- */
  REPEAT for 511 rows
    Clock image array/framestore to sum "n" rows in output registers
    Discard dummy pixels and indicate start of row (HSYNC)
    REPEAT for all summed pixels in output register
      Clock output register to sum "m" pixels. Sample result.
    ENDREPEAT
    Discard TBD output register pixels prior to producing overclocks
    REPEAT for each overclock pixel sum
      Clock output register to sum "m" overclocks. Sample result.
    ENDREPEAT
  ENDREPEAT
  Jump to PRAM Page 1

35.4.6 Parallel Transfers with Multiple CCDs

Assuming constraints on the maximum number of rows and columns that may be summed (TBD), phase-delays between image array/framestore row transfers on different CCDs, such as those used by Timed Exposure Mode (see Section 34.4.6), are not required.

35.5 Class PramCc

Documentation:

This class generates the Program RAM sequence needed to perform Continuous CCD Clocking.

Export Control:

Public

Cardinality:

n

Hierarchy:

Superclasses:

none

Public Uses:

SramLibrary

Implementation Uses:

DeaManager deaManager

Public Interface:

Operations:

build()
configure()

Protected Interface:

Operations:

blockEnd()
blockStart()
emitBlockHeader()
emitBranchBlock()
emitCouplet()
emitDataSet()
emitDiscardOr()
emitImageToFrame()
emitSummedPixel()
generateSequence()
setPramBlock()

Private Interface:

Has-A Relationships:

unsigned rowSum: Number of rows to sum on-chip.

unsigned colSum: Number of columns to sum on-chip.

QuadMode qMode: Quadrant Configuration: Full, Diagnostic, AC, or BD.

unsigned overclockPairs: Number of pairs of overclock pixels to output

Boolean gain4: Determines whether or not to use high-gain SRAM timing. If BoolFalse, use 1:1 SRAM, if BoolTrue, use 1:4 SRAM timing.

const unsigned arrayRows: Number of non-summed rows in the CCD Image and Frame Store

const unsigned nodeCols: Number of un-summed columns per output node (assuming all 4 nodes in use)

const unsigned dummyCols: Number of dummy columns between the output register and the output node.

const unsigned initialRows: Number of rows to initially discard at beginning of run to achieve consistent integration times.

const unsigned ocDummy: This contains the number of dummy pixels to clock out of the output register prior to clocking out overclock pixels.

const unsigned summedRows: This is the total number of summed rows to clock out of the CCD per data set.

DeaBoardId curboard: This specifies the current DEA CCD-controller being programmed.

SramLibrary sramLibrary: This points to the SRAM library to use when loading PRAM.

Implementation:

Has-A Relationships:

unsigned shiftCols: This specifies the number of unsummed columns per output node (not including dummy columns).

unsigned summedShiftCols: This specifies the number of summed columns to shift out for each row.

unsigned pramAddress: Current PRAM Address

enum BLK_STATE blockState: Indicates current PRAM header state. BLK_NONE indicates no header has been written, BLK_STARTED indicates that space for a block has been reserved at location blockAddress. BLK_ENDED indicates that a block has been ended but not yet written. blockAddress contains the address for the header, blockCount indicates the number of couplets in the block, and blockRepeat indicates the number of times to repeat the block.

unsigned blockAddress: PRAM Address of started block

unsigned blockRepeat: Repeat count for the block

unsigned blockCount: SRAM couplets in the block

Boolean configured: This flag indicates whether or not configure() has been called. If not, this field contains BoolFalse. If configure() has been called the field is BoolTrue.

Concurrency:

Guarded

Persistence:

Transient

35.5.1 blockEnd()

Protected member of:

PramCc

void

This function marks the end of a PRAM block by setting blockState to BLK_ENDED.

Preconditions

This function assumes that blockStart() has been called and that blockState is set to BLK_STARTED.

Postconditions

blockState = BLK_ENDED

Concurrency:

Guarded

35.5.2 blockStart()

Protected member of:

PramCc

Boolean

Arguments:

unsigned repeat

This function starts a block, storing repeat as the block's repeat count, blockRepeat, and zeroing the block's couplet count blockCount.

Preconditions:

repeat must not be zero and must be less than or equal to PRAM_MAX_HDR_REPEAT (4096).

Semantics

If a previous block has been started (blockState == BLK_STARTED), end it by calling blockEnd(). If the header from the previous block has not been output yet (blockState == BLK_ENDED), emit the header using emitBlockHeader(). Store repeat in blockRepeat, the current pramAddress in blockAddress, and zero blockCount. Advance the current PRAM address, pramAddress, by two locations and indicate that a block is in progress by setting blockState to BLK_STARTED.

Postconditions

blockState = BLK_STARTED, coupletCount is zero to start logging the number of SRAM cycles within the block. The block must be ended using blockEnd(), and flushed to PRAM using emitBlockHeader().

Concurrency:

Guarded

35.5.3 build()

Public member of:

PramCc

Boolean

Arguments:

DeaBoardId boardid

This function builds a PRAM sequence and loads the sequence into the DEA CCD-controller specified by boardid.

Preconditions:

configure() must have been called (configured == BoolTrue), and boardid must identify a CCD-controller.

Semantics

Store boardid into curboard and call generateSequence() to produce the load

Postconditions

The selected CCD-controller's PRAM will contain the generated instruction sequence.

Concurrency:

Guarded

35.5.4 configure()

Public member of:

PramCc

Boolean

Arguments:

unsigned rowsum
unsigned colsum
QuadMode quadrants
unsigned ocPairs
Boolean highGain
SramLibrary& sramlib

This function configures the Continuous Clocking PRAM builder. rowsum is the number of rows to sum, and colsum is the number of columns to sum per output pixel. quadrants indicates the output node configuration and clocking direction (Full, Diagnostic, AC, or BD). ocPairs indicates the number of pairs of overclock pixels to generate. sramlib is a reference to the SRAM library to use when building PRAM.

Preconditions:

rowsum and colsum must be less than some TBD values (determined by TBD DEA power constraints).

Semantics

Copy the parameters into the corresponding instance variables, configure the SRAM library's gain and output register direction, and compute derived clocking count information. Finally, set configured to BoolTrue.

Concurrency:

Guarded

35.5.5 emitBlockHeader()

Protected member of:

PramCc

Boolean

Arguments:

unsigned operation
unsigned page

This function emits the PRAM couplet block header, storing blockRepeat for the repeat count, and blockCount as the couplet count. operation is the action the sequencer should take after the block has been run, and page indicates the page address to jump to (if action is to page jump). NOTE: This function was not combined with blockEnd() because the operation and page information are not necessarily known when blockEnd() is called.

Preconditions:

blockEnd() must have been called (blockState == BLK_ENDED), and there must be at least 1 couplet within the block (blockCount != 0), and 1 iteration of the block (blockRepeat != 0). This function assumes that blockAddress is set to the desired PRAM address of the header.

Semantics

Fill the header sequence count (blockRepeat - 1), post-block operation (operation), couplet count (blockCount -1), and post-block page (page). Call deaManager.writePram() to write the header word pair into the CCD-controller's PRAM. Once written, zero blockRepeat and blockCount. Indicate that no header block is active or waiting to be flushed by setting blockState to BLK_NONE.

Postconditions

The current block's header is written into PRAM. The current block is ended. In order to write another set of couplets, blockStart() must be called.

Concurrency:

Guarded

35.5.6 emitBranchBlock()

Protected member of:

PramCc

Boolean

Arguments:

unsigned id

This function emits a PRAM instruction which jumps to a new PRAM block, indicated by id.

Preconditions:

A block must be in-progress or waiting to be written (i.e. blockState != BLK_NONE)

Semantics

If a block has been started, but has not yet been ended (blockState == BLK_STARTED), call blockEnd() to close it off. Then call emitBlockHeader(), passing a "jump to page" as the operation to perform once the block has been run, and id as the page to jump to.

Concurrency:

Guarded

35.5.7 emitCouplet()

Protected member of:

PramCc

Boolean

Arguments:

unsigned sramaddr
unsigned pixcode
unsigned repeat

This function emits a couplet, where sramaddr is the index of the SRAM block to cycle, pixcode is the pixel code to emit during the cycle, and repeat is the number of times to repeat the cycle.

Preconditions:

repeat must not be zero and must be less than or equal to PRAM_MAX_BLK_REPEAT (4096). The number of couplets associated with the current header, blockCount, must be less than PRAM_MAX_BLOCKS (4096).

Semantics

If a PRAM header has not been started, start one by calling blockStart(), using a repeat count of 1. Fill the couplet pixel code using pixcode, its SRAM address using sramaddr, and the number of times to repeat the single SRAM block (repeat - 1). Call deaManager.writePram() to write the couplet word pair into the CCD-controller's PRAM. Once written, advance the number of cycles produced by incrementing coupletCount by repeat. Advance the PRAM address by two words, and increment the number of couplets in the current block (blockCount).

Concurrency:

Guarded

35.5.8 emitDataSet()

Protected member of:

PramCc

Boolean

Arguments:

unsigned nrows
Boolean flush

Emit PRAM instructions to produce 1 data set of continuously clocked CCD pixels. nrows specifies the number of rows to emit in the data set, and flush indicates whether or not to use the produced data set. If flush is BoolFalse, treat clocked data as valid pixels. If flush is BoolTrue, then ignore all clocked data. This is used to discard the initial contents of the image array and framestore at the start of the run.

Semantics

Use two passes to produce the PRAM load for a data set. On the first pass, emit the PRAM instructions to sum and transfer the first row of the data set. The second pass emits a PRAM loop which transfers the remaining rows of the data set.

On each pass, call emitImageToFrame() to clock rowSum rows from the image array to the framestore, and from the framestore into the output registers. The rows are summed into the output registers. Then call emitDiscardOr() to discard the dummy pixels from the output register. On the first pass, flag the last dummy pixel with a VSYNC pixel code, to indicate the start of the data set. On subsequent rows of the data set, use the HSYNC pixel code to delimit the start of each output row. Once the dummy pixels are discarded, call emitSummedPixel() to sample summedShiftCols summed output pixels from output register. If overclocks are being used, call emitDiscardOr() to discard a TBD number of pixels prior to clocking the overclocks, and then call emitSummedPixel() to sample (2*overclockPairs) summed overclock pixel values.

Concurrency:

Guarded

35.5.9 emitDiscardOr()

Protected member of:

PramCc

Boolean

Arguments:

unsigned npix
unsigned pixcode

Emit PRAM couplets which clock npix columns from the output register into the output node, each time, discharging the output node, effectively discarding the pixels. pixcode indicates the pixel code to use when discarding the pixels.

Semantics

If npix is greater than or equal to 2, start by discarding pixels two at a time by fetching the SRAM block using sramLibrary->getOrToOnX2(), and emitting the couplet with a repeat count of npix/2, using emitCouplet(). Pass pixcode as the pixel code to emit while performing the clocking. Then adjust npix to contain the remainder (NOTE: Use of a remainder is a hook in case faster SRAM blocks become available).

If npix is not zero (in this case, it will be 1), get the SRAM block to discard 1 pixel using sramLibrary->getOrToOn(), and emit the couplet to repeat npix times, using emitCouplet() and passing pixcode as the pixel code to emit while performing the clocking.

Concurrency:

Guarded

35.5.10 emitImageToFrame()

Protected member of:

PramCc

Boolean

Arguments:

unsigned nrows

This function clocks nrows from the image array to the framestore, and from the framestore into the output register. The rows clocked into the output register are summed with each other, and with charge already in the output registers.

Semantics

Call sramLibrary->getImageToFrame() to obtain the starting index of the series of blocks which transfer one row from the image array to the framestore and from the framestore to the output register, and to obtain the number of adjacent blocks need for the transfer. If only 1 block is required, call emitCouplet(), passing the index of the block, and a repeat count of nrows to emit the PRAM instructions for the transfer.

If more than one block is needed and more than one row is being output, emit the series of blocks nrows times (NOTE: In this clocking mode the repeat block is used to count summed output rows, rather than rows being summed).

Concurrency:

Guarded

35.5.11 emitSummedPixel()

Protected member of:

PramCc

Boolean

Arguments:

unsigned npix
PRAM_PIXCODE pixcode

Emit PRAM couplets which emit a series of npix summed pixels from the output register. Each output pixel is flagged with the pixcode pixel code, and consists of the sum of colSum output register pixels.

Semantics

This function starts by obtaining the SRAM indices which sum and accumulate a pair of pixels, sum a pair of pixels and sample the accumulated value, and add a single pixel and sample the accumulated result, using sramLibrary>getOrToOrSumX2(), sramLibrary>getOrToOnX2() and sramLibrary>getOrToOn(), respectively.

It then enters a loop which iterates npix times. Each iteration sums colSum pixels and emits a couplet specifying an SRAM block using emitCouplet(). The SRAM blocks are chosen to minimize the number of cycles needed to perform the operation for each pixel. If colSum is greater than two, it emits a couplet which sums and accumulates pairs of pixels colSum/2 times. If colSum is even, it emits a final couplet which sums two more pixels and samples the result. However, if colSum is odd, it emits a final couplet which accumulates just one more pixel and samples the accumulated sum.

Concurrency:

Guarded

35.5.12 generateSequence()

Protected member of:

PramCc

Boolean

This function runs through the PRAM generation process. The first portion of the function emits PRAM instructions which flush the initial contents of the image array, and the second portion calls emitDataSet() to emit PRAM instructions which produce 1 data set worth of continuous clocking pixels.

Semantics

Generate an initial flush of the image array and framestore in PRAM Page 0. Call setPramBlock() to set pramAddress to Page 0. Then call emitDataSet(), passing a row count of (1026 * 2) to flush both the image array and framestore rows. Then emit a branch to PRAM Page 1 using emitBranchBlock().

Generate the main clocking sequence in PRAM Page 1. Call setPramBlock() to set the pramAddress to Page 1. Then call emitDataSet() to produce the PRAM load which clocks a single data set of 512 summed rows. Then call emitBranchBlock() to loop back to the start of PRAM Page 1 to repeatedly produce data sets.

Concurrency:

Guarded

35.5.13 setPramBlock()

Protected member of:

PramCc

void

Arguments:

unsigned id

This function sets the current pramAddress according to the PRAM block selected by id. The passed id can range from 0 to 15.

Concurrency:

Guarded

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