ACIS PDR Software RIDS

Last updated: Wed May 10 22:34:43 EDT 1995

RIDs Remaining Open from S/W PDR


 1 ISWP-0010    Software timing information

 2 ISWP-0011    software interfaces

 3 ISWP-0017    time to handle

ISSUE SUBJECT: Software timing information
ITEM REVIEWED: 36-01103-03
DISCREPANCY/PROBLEM: Software timing information and budgets are conspicuously absent. 3.3 mentions some parameters, in particular the ability to process over 1000 threshold crossings per CCD per second, but this is never broken down or associated with the functional requirements in previous paragraphs.
INITIATOR/PHONE: Leon Rogson 310-814-4788
ORGANIZATION: TRW SE&I;
DATE: October 27, 1994
TEAM NAME: Software
DEVELOPER'S COMMENTS: We'll study this and discuss it at the PDR reviewers team meeting.
REMARKS: ACIS will establish the timing budget by Software CDR and will provide the scenarios for which the budget applies.
ACTIONEE: MIT/P. Ford
SUSPENSE DATE: 6-30-95
IMPLEMENTATION: Added an appendix, FEP Timing Budget, to the Detailed Design Specification document, which discusses the processing time of various Front End Processor science modes.

ISSUE SUBJECT: software interfaces
ITEM REVIEWED: 36-01103-03
DISCREPANCY/PROBLEM: The operating system controlling the backend processor is mentioned but its characteristics are not defined. Neither are the software interfaces between the backend processor and the front end processor explained.
INITIATOR/PHONE: Leon Rogson 310-814-4788
ORGANIZATION: TRW SE&I;
DATE: October 27, 1994
TEAM NAME: Software
DEVELOPER'S COMMENTS: We believe that this comment was withdrawn. We referenced the Nucleus RTX operating system manual in the Requirements Specification. The interface between the FEPs and the BEP wasn't designed when the PDR material was presented. It will be described fully in the CDR materials.
REMARKS: ACIS will describe the FEP/BEP interfaces in the Software Design Document.
ACTIONEE: MIT/P. Ford
SUSPENSE DATE: 6-30-95
IMPLEMENTATION: Added a sections entitled BEP to FEP Communication Protocol and FEP to BEP Science Protocols and Formats to the Detailed Design Specification document. These sections describe the low and high level interfaces, respectively.

ISSUE SUBJECT: time to handle
ITEM REVIEWED: 36-02402-01
DISCREPANCY/PROBLEM: P25. The design requirement on "the time to handle... interrupts..." should be in the requirements document.
INITIATOR/PHONE: Leon Rogson 310-814-4788
ORGANIZATION: TRW SE&I;
DATE: October 27, 1994
TEAM NAME: Software
DEVELOPER'S COMMENTS: We'll add an interrupt timing requirement to section 3.3 of the Software Requirements Specification.
ACTIONEE: MIT/P. Ford
SUSPENSE DATE: 6-30-95
IMPLEMENTATION: Added a section entitled Timer Interrupt Response Time to the Software Requirements Specification document, stating
"In order to ensure the validity of the internal Back End Processor Tick counter (BEP Tick Counter) the handling time of the timer interrupt, plus all other interrupts with a higher priority, plus the longest period during which interrupts are disabled, shall be at least 20% shorter than the fastest timer tick responded to by the system."