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Purpose
This section describes the timing budget for the science and bias processing modes of the Front End Processor. It details the conditions under which the data throughput requirements of the ACIS Contract End Item Specification (§3.1.3.2a of 36-01101-06) are to be met. These are stated as follows:
These requirements only apply to event mode, not to either histogram or raw mode, since these are for diagnostic purposes only. However, in the interest of completeness, timing budgets have been constructed for all modes.
Overall Approach
Since the FEP software has been designed according to function rather than performance, timing requirements were not imposed a priori in the design, but rather as a set of a posteriori qualifications to which the prototype designs were subjected. The process is went follows:
Results
The results are shown in Table 49. The "cycles" column lists the number of machine instructions that were generated for each function, and the "access" column lists the number of 32-bit accesses to non-cache memory, assuming each row contains 1024 pixels and 128 overclocks (a maximum of 32 from each of 4 output nodes).
The rightmost column estimates the execution time of each function, assuming that all cache accesses occupy a single machine cycle (0.1 µsec), and that non-cache accesses require an additional 2 cycles to perform.
TABLE 49. FEP machine cycles and non-cache memory accesses
--------------------------------------------------------------------------------- Science Mode Function Sub-function Cycles Access Msec --------------------------------------------------------------------------------- Timed Event Set Up 237 0.023 Per CCD row Set Up 71 0.007 Overclocks 1600 64 0.173 Threshold detection 7424 32 0.755 Total 9095 96 0.935 Per threshold crossing Set Up 57 2 0.006 Detect event 179 12 0.021 Copy to BEP 152 11 0.018 Total 388 25 0.045 Per CCD frame(a) Set Up 237 0.023 Total (msec per frame) 1074.500 Raw Pixels Set Up 150 0.015 Per CCD row Set Up 57 0.006 Format pixels 3584 512 0.461 Format overclocks 768 64 0.090 Copy to BEP 5762 574 0.691 Total 10114 1150 1.248 Per CCD frame(b) Set Up 119 0.012 Total (msec per frame) 1277.970 Histogram Set Up 162 0.017 Per CCD row Set Up 45 0.005 Pixel histogram 7860 512 0.885 Average overclocks 5376 64 0.551 Total 13281 576 1.441 Report buffer Clear buffer 65561 6.556 Copy to BEP 163992 16395 19.679 Per CCD frame(c) Set Up 124 0.013 Total (msec per frame) 1475.600 ---------------------------------------------------------------------------------
The times quoted in Table 49 were based on the most pessimistic assumptions for a full-frame timed exposure---a readout time of 2.6 seconds, and hence a total of 2600 threshold crossings, each of which is a local maximum and therefore causes an event record to be sent to the BEP. The figure of 1.074 seconds of CPU time per frame represents a performance margin of 59%. Note, however, that most of the processor time is spent in locating the threshold crossings---the overhead incurred in determining whether a particular crossing is a local minimum, and then copying the event record to the ring buffer, is very small. Inverting the argument, Figure 201 shows how the maximum number of threshold crossings per second is expected to vary with the time between exposures. The break at 2.6 seconds marks the point at which shorter readout times can only be achieved by clocking the CCD in sub-frame readout mode.
FIGURE 201. Threshold Crossings vs. Inter-Exposure Time
There are two conditions under which the CEI specification may not be met. First, when partial frames are read from the CCDs (sub-frame mode) and the inter-exposure time is less than about 0.2 second. In this situation, the need to synchronize the FEP processors via frequent BEP handshakes, coupled with the overhead of generating exposure records, will cause the performance to deteriorate in a TBD manner.
Second, when a disproportionate number of threshold crossings are concentrated at the bottom of the image frame, i.e. the part that is examined last, the FEP may not have sufficient time to process the pixels before they are overwritten by the next frame. This would cause the BEP to command all FEPs to skip a frame. If this condition persists, the overall duty cycle would be halved.
Table 49 also shows that histogram mode possesses a 43% margin in its ability to process full 1024-line image frames at an inter-exposure time of 2.6 seconds. However, each set of histogram arrays occupies 66 Kbytes, which will eventually saturate the 24 Kbaud telemetry downlink if reported more frequently than once per 22 seconds (once per 18 minutes in 500 baud "next-in-line" mode). Similarly, the FEPs possess adequate margin in raw mode, but will quickly fill available buffer space in the BEP and FEPs.