2 CCD Description

The ACIS CCDs, described by Burke, et al.[7] are fabricated at MIT's Lincoln Laboratory on p-type high resistivity (nominally 6500--cm) silicon, in order to obtain depletion depths large enough for efficient detection of higher energy (> 4 keV) photons. Each CCD contains an imaging array of 1026 by 1024 24 m pixels, and a frame store array with the same number of pixels. In normal operation, an image is accumulated for a period of 3 - 7 seconds in the imaging array, then rapidly transferred to the frame store array for readout. The frame store is divided into two sections, each of which feeds two independent serial registers with output circuitry, yielding 4 output quadrants of 256 columns by 1026 rows.

The incoming flux is arranged to be low enough so that individual X-ray photons are detected. This typically requires a flux lower than one detected ``event'' per 100 pixels per frame. For each X-ray event, the distribution of charge in a 3 pixel by 3 pixel neighborhood is examined. To maximize background rejection efficiency and spectral resolution, only events with certain shapes (grades) are accepted as valid. Quantum efficiency is therefore a function of event selection criteria. In this paper we report results for detector efficiency for events in which charge is confined to 1 or 2 pixels.

The reference CCDs are identical to the flight CCDs in design and fabrication. The electronics available at the time of the reference CCD calibration at PTB/BESSY were however of an earlier generation than the ACIS design. Consequently, all measurements with the reference CCDs described herein have utilized the older electronics for consistency, including both the high energy calibration vs. the solid state detector and the subsequent cross-calibration of the flight CCDs. (The flight CCDs are of course calibrated with electronics of the ACIS flight design.) The same operating conditions have also been maintained for the reference CCDs: detector temperature -120C, frame integration times of 7.15 seconds, and the same clocking voltages as initially used at BESSY. The voltages on the clocking phases are particularly important, as they affect the depletion depth of the active silicon region beneath the gates. This affects the detection efficiency, especially for higher energy X-rays that might penetrate the depletion depth before interacting. Increasing the parallel high clock voltage from 5V (typical value) to 10V can change the detection efficiency for the Mn K line at 5.9 by almost 10%, for example.